Snapback-Free Base Resistance Controlled Thyristor With Floating N-Region

An analysis model of snapback voltage for the base resistance controlled thyristor (BRT) is developed in this paper. It's shown that, improving hole current flowing into P-base region is an important way to suppress snapback phenomenon during forward conducting state. Thus, a new BRT with a floating N-region in N-drift layer is proposed. In this new structure, the floating N-region introduces a hole potential barrier in parasitic PNP to prevent holes front being swept into cathode. Then, almost all of hole current flow into P-base to trigger latch-up effect and the parasitic PNP transistor is greatly suppressed. Thus, snapback is significantly suppressed. Numerical simulation results show that, when doping level and length of floating N-region arc 8.0 x 10(15) cm(-3) and 5.0 mu m, snapback-free can be realized, and pulse discharge performance and turn on characteristics are greatly improved meanwhile the high blocking capability is maintained.