High‐κ dielectric (HfO₂)/2D Semiconductor (HfSe₂) Gate Stack for Low‐Power Steep‐switching Computing Devices

AbstractHerein, we report a high‐quality gate stack (native HfO2 formed on 2D HfSe2) fabricated via plasma oxidation, realizing an atomically sharp interface with a suppressed interface trap density (Dit ∼ 5×1010 cm−2 eV−1). The chemically converted HfO2 exhibits dielectric constant, κ ∼ 23, resulting in low gate leakage current (∼10−3 A/cm2) at EOT ∼0.5 nm. Density functional calculations indicated that the atomistic mechanism for achieving a high‐quality interface is the possibility of O atoms replacing the Se atoms of the interfacial HfSe2 layer without a substitution energy barrier, allowing layer‐by‐layer oxidation to proceed. The field‐effect‐transistor‐fabricated HfO2/HfSe2 gate stack demonstrated an almost ideal subthreshold slope (SS) of ∼ 61 mV/dec (over four orders of IDS) at room temperature (300 K), along with a high Ion/Ioff ratio of ∼108 and a small hysteresis of ∼ 10 mV. Furthermore, by utilizing a device architecture with separately controlled HfO2/HfSe2 gate stack and channel structures, we fabricated an impact ionization FET that exhibited n‐type steep‐switching characteristics with an SS value of 3.43 mV/dec at room temperature, overcoming the Boltzmann limit. Our results provide a significant step toward the realization of post‐Si semiconducting devices for future energy‐efficient data‐centric computing electronics.This article is protected by copyright. All rights reserved