Investigation of silicon-on-insulator back-gate nano vacuum channel transistor array

Recent advances in nanofabrication have made it possible to combine planar solid-state devices with vacuum electronics to create planar nano vacuum channel transistors that offer the advantages of cold-field emission and ballistic transmission. However, the current research is mainly limited to the study of a single field emission transistor, which has problems such as low current and poor gate control capability. To solve the above problems, a multitip field emission array is used in this work, and gate modulation is performed by a back-gate structure to fabricate and process a back-gate nano vacuum transistor array. First, we conducted simulation modeling of the back-gate nano vacuum transistor, investigated the impact of its structural parameters on its performance, and obtained the optimal simulation results. Then, structural parameters of the back-gate nano vacuum channel transistor array (BG-NVCTA) are selected based on the simulation results and fabricated by electron beam lithography on the silicon wafer. The experimental results, agreed well with the simulation results, show that the BG-NVCTA device has excellent gate control characteristics and a high current density. Its anode current is greater than 5 mu A, and the transconductance is 1.05 mu S when the anode voltage is 5 V.