A 768.7-2124.2 TOPS/W Time-Domain Computing-in-Memory Macro With Low Static Leakage and Precision-Configurable TDC

IEEE Transactions on Circuits and Systems II: Express Briefs(2023)

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摘要
In always-on edge devices, the static leakage current in weights retention accounts for a significant proportion of power consumption. Furthermore, the analog-to-digital converter (ADC) module consumes a lot of area and power in most computing-in-memory (CIM) architectures. Therefore, this design presents an 8 Kb time-domain (TD) CIM macro with low static leakage. In addition, this work takes advantage of the scalability of TD-CIM and presents a precision-configurable time-to-digital converter (TDC) applied to scenarios that require adjustable accuracy. It achieves configurable precision of 2 to 4 bits with a multiplication-and-accumulation (MAC) range of 32 in each delay chain. The TDC module accounts for only 2.9% of the total macro area, achieving nearly a tenfold improvement over prior works. The measured normalized energy efficiency is 768.7-2124.2 TOPS/W. The static leakage of the macro is 206 fW/bit while VDD is 1.2 V. This work achieves 91.1%-86.1% inference accuracy on the CIFAR-10 dataset with 8-bit precision in inputs and weights.
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关键词
SRAM,computing-in-memory,time-domain,precision-configurable,time-to-digital converter
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