Desat Protection with Ultrafast Response for High Voltage SiC MOSFETs with High dv/dt

This paper presents a desat protection scheme with ultrafast response for high voltage (>3.3 kV) SiC MOSFETs. Its working principle is the same as the conventional desat protection designed for high voltage SiC MOSFETs, yet its blanking time is implemented by fully considering the influence of high negative dv_ds/dt during the fast turn-on transient. With the same circuitry as the conventional desat protection, the proposed protection scheme can significantly shorten the response time of the desat protection when it is used to protect high voltage SiC MOSFETs. In addition, the proposed protection scheme with ultrafast response features strong noise immunity, low-cost, and simple implementation. By taking advantage of the high dv/dt during the normal turn-on transients, the proposed protection scheme can be even faster when the MOSFET has faster switching speed. Design details and the response speed analysis under various short circuit faults are presented in detail. A half bridge phase leg based on discrete 10 kV/20 A SiC MOSFETs is built to demonstrate the proposed protection scheme. Experimental results at 6.5 kV validate the ultrafast response (115 ns response time under a hard switching fault (HSF), 155 ns response time under a fault under load (FUL)) and strong noise immunity of the proposed desat protection scheme.