A novel partition strategy for efficient implementation of 3D Cellular Genetic Algorithms

Solving optimization problems while fulfilling real-time constraints requires high algorithmic and processing performance. Cellular Genetic Algorithms (cGAs) have been competitive at difficult single objective combina-torial and continuous domain problems. Moreover, it has been demonstrated that structural properties in cGAs, such as population topology dimension, local neighborhood configuration and ad-hoc selection mechanisms, allow not only further algorithmic improvement but also, these characteristics can be combined at hardware level for acceleration. In this article, a novel partition strategy to exploit 3D cGAs population dynamics on a 2D processing array using Field Programmable Gate Arrays (FPGAs) as the target processing platform is presented. The proposed architecture fits as an optimization module within an embedded system where real-time constraints must be fulfilled. Therefore, it is important to find an optimal trade-off between hardware resources usage and searching time. Overall results demonstrate that the proposed architecture can run up to 90 MHz when tackling continuous benchmark functions. Moreover, speed-up of up to three and two orders of magnitude are achieved in comparison to a single CPU and a parallel GPU respectively.