Oxidation differences on Si- versus C-terminated surfaces of SiC during planarization in the fabrication of high-power, high-frequency semiconductor device.

Silicon carbide (SiC) wafers have attracted attention as a material for advanced power semiconductor device applications due to their high bandgap and stability at high temperatures and voltages. However, the inherent chemical and mechanical stability of SiC poses significant challenges in the chemical mechanical planarization (CMP) process, an essential step in reducing defects and improving surface flatness. SiC exhibits different mechanical and chemical properties depending on SiC terminal faces, affecting SiC oxidation behavior during the CMP process. Here, we investigate the process of oxide layer formation during the CMP process and how it relates to the SiC terminal faces. The results show that under the same conditions, the C-terminated face (C-face) exhibits higher oxidation reaction kinetics than the Si-terminated face (Si-face), forming an oxide layer of finer particles. Due to the different oxidation kinetic tendencies, the oxide layer formed on the C-face has a higher friction coefficient and more defects than the oxide layer formed on the Si-face. This results in a higher removal rate during CMP for the C-face than the Si-face. Furthermore, by controlling the physicochemical properties of the oxide film, high removal rates can be achieved by friction with the pad alone, without the need for nanoparticle abrasives.