A 3.8 mW 1.9 m/Hz Electrical Impedance Tomography Imaging with 28.4 M High Input Impedance and Loading Calibration
IEEE 49TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE, ESSCIRC 2023(2023)
摘要
This paper proposes an advanced electrical impedance tomography (EIT) imaging IC that is designed to enhance stability against contact impedance variations. The 6 mm(2) chip is fabricated using a TSMC 180 nm CMOS process and contains 2 key features: 1) a high input impedance instrumentation amplifier (IA) with auxiliary source followers for robust voltage sensing, and 2) a Trans-Conductance (TC) current driver with Trans-Impedance (TI) monitoring circuit for precise measurement of the injected current while eliminating the loading effect. The proposed IC has a low power dissipation of only 3.8 mW, excluding the injection current, and offers an impressive impedance resolution of 1.9 m Omega/root Hz. The input impedance of the IA has been increased up to 2.9 G Omega at 100 Hz and 230 k Omega at 1 MHz, indicating high performance over a wide range of frequencies. The effectiveness of the proposed EIT imaging IC is demonstrated by successfully reconstructing 3D images of a human body phantom using a mobile device.
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关键词
Active shield buffer, breast cancer detection, electrical impedance tomography (EIT), impedance spectroscopy, injection current monitoring, loading calibration
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