Influence of Parasitic Parameters on Dynamic Threshold Voltage Hysteresis of Silicon Carbide MOSFETs

Threshold voltage ( V-TH ) hysteresis affects the dynamic characteristics of silicon carbide (SiC) MOSFETs, which in turn affects reliability of a device. In this paper, a dynamic hysteresis curve is proposed as an evaluation method of the influence of V-TH hysteresis on the switching characteristics of SiC MOSFETs. This method can eliminate the impact of trigger level and obtain the dynamic V-TH . Furthermore, the influence of parasitic parameters on dynamic V-TH hysteresis is theoretically analyzed. Double pulse tests under different parasitic parameters are performed on three SiC MOSFETs with different gate structures to verify the analysis. Results show that gate resistance ( R-G ) and source inductance ( L-S ) have more significant effects on dynamic V-TH hysteresis compared with gate inductance and drain inductance. V-TH hysteresis phenomenon weakens with increase of RG or LS , which is related to device structure. The results presented in this paper can provide guidance for the design of circuit parasitic parameters of SiC MOSFETs to regulate V-TH hysteresis.