Memristor Based Mixed-Accuracy Computation-in-Memory System.

Conventional computing systems based on von Neumann computing architecture and full-accuracy digital computing paradigm are facing great challenges due to the memory-wall bottleneck issues. The compute-in-memory (CIM) technology based on emerging memristor devices can reduce data moving, and thus significantly improve the computing density and energy efficiency. However, optimizing the trade-off between computing accuracy and latency of the CIM architecture become new issues. While strides have been made in enhancing performance at the distinct levels of algorithm, system, and circuit individually, the field remains relatively uncharted when it comes to cross-level co-optimization. In this investigation, the inference accuracy of neural networks is prioritized as the chief evaluative metric, with latency considered secondary. We propose a spectrum of parameter optimization strategies for the CIM computation system, thereby offering valuable insights into the design and application of circuits.