A New 24 GHz Triple-Push Voltage Controlled Oscillator Architecture in $0.25\ \mu \mathrm{m}$ BiCMOS SiGe:C Technology

This paper presents the design and the implementation of a new 24 GHz Triple-Push Voltage Controlled Oscillator (VCO) architecture, integrated and implemented in the QUBiC4X 0.25 μm SiGe:C BiCMOS process of NXP semiconductor. A differential LC VCO is first designed at 8 GHz, and a new approach is used to couple the three VCOs together through a resistor via the varactor diodes in order to obtain the 120° phase shift necessary to cancel the fundamental and second harmonic and add only the third harmonic at 24 GHz. The post layout simulation results of the proposed triple-push VCO provides an output power of -5.76 dBm at 24 GHz with a variation of 0.55 dB when frequency varies from 21.94 GHz to 25.64 GHz. The rejection of the fundamental and second harmonic is more than 27.67 dB and 19.65 dB respectively at 24 GHz. The power consumption ( 50 Ω outputs) is 113.64 mW with a supply voltage of 3 V. The total surface area of the chip is 1.227x 1.176mm ² including the pads.