High-Level Synthesis of a Long Horizon Model Predictive Control Algorithm for an FPGA

This paper deals with a field-programmable gate array (FPGA) implementation of a long-horizon finite control set model predictive control (FCS-MPC) for a medium voltage drive system. By using the high level synthesis (HLS) tool from Xilinx, the VHDL code is directly generated from the C-code allowing for higher level of abstraction and faster prototype development. The controller execution time is under 20 mus during both steady-state and transient conditions, as confirmed by the presented results obtained based on a real-time “FPGA-in-the-loop” (FIL) implementation.