A Covert Attack Method against FPGA Clouds

With the widespread use of FPGA clouds in high-end fields such as artificial intelligence, its security issues have become a major focus for both academia and industry. In this paper, we propose a covert Denial-of-Service (DoS) attack method that specifically targets commercial FPGA clouds, posing a serious threat to the availability of FPGA clouds. Firstly, we design a malicious ring oscillator network (RON) that can evade the design rule checking of FPGA clouds. Then, we propose a resource adjustment algorithm to determine the maximum number of ring oscillators (ROs) in the RON while satisfying the FPGA's power and on-chip temperature constraints to guarantee the covertness of the attack process. Finally, we manually search for the efficient attack frequency for the RON to attack FPGAs. To validate our method, we perform DoS attacks on XVU9P and 10AX115 FPGAs. The results demonstrate that our method can evade the security measures of FPGA clouds and successfully crash FPGAs.