High-Performance Hardware Accelerators for Next Generation On-Board Data Processing

Hyperspectral imaging is a key remote sensing technology. The explosive growth in hyperspectral image data volume (several TBs per orbit) and instrument data rates (in the range of 20 Gbps), compete with limited available on-board storage resources and downlink bandwidth, making hyperspectral image data compression a mission critical on-board data processing task. In order to provide continuous and reliable data transfer from the on-board systems to the ground stations, channel coding is being applied at the end of the data processing pipeline to guarantee reliable communications even at low signal-to-noise ratio regimes. Moreover, erasure correcting codes working on information packets rather than bits or symbols, can provide downlink reliability in future RF and optical links especially when Automatic Repeat Queuing (ARQ) strategies are either problematic or impossible due to specific service delay constraints and intermittent connectivity. Committed to the vision for "Space Technology Designed in Greece", in this special session paper, we provide an overview of cutting-edge technology high-performance hardware accelerators developed in the NKUA Digital Systems and Computer Architecture Laboratory (DSCAL), applicable to next-generation payloads for earth observation, optical/RF communication and connectivity, including CCSDS hyperspectral image compression and channel-coding at bit-level and packet-level.