A novel sign detection method in residue number system based on Chinese remainder theorem with fractional values

Sign detection is a non-modular operation in the residue number system (RNS). It requires the calculation of the number positional characteristic represented in the RNS. This work proposes a new sign detection method based on the Chinese Remainder Theorem (CRT) with fractional values implemented using the Wallace tree and the modified Kogge-Stone adder. Hardware modelling on FPGA for the proposed method shows that it provides 1.3 - 36.3 times less hardware costs than the other state-of-the-art (SOTA) methods, and for ASIC modelling the proposed method provides 1.14 - 35.74 times less hardware costs than the other SOTA methods. The presented sign detection method can be helpful in RNS-based devices in implementing comparison and division operations, providing an extension of the RNS application in areas such as cryptography, machine learning, and digital signal processing.