A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic.

Pass transistor logic (PTL) has emerged recently in advanced high-speed optical communication system due to its higher speed and lower power consumption compared to traditional CMOS logic. However, the sensitivity to radiation-induced soft errors of PTL implementations is significant different from CMOS circuitry, which emphasizes the need for understanding the mechanism of soft error propagation in PTL. Due to the non-conventional logic structure in PTL, previous approaches of pulse width modelling in CMOS logic are no more applicable since they are not always measurable. Hence, in this paper, we propose a learning-based structural regression modeling approach to explore the soft error propagation mechanism in PTL at transistor level. Our models can be easily mapped onto higher level to analyze soft error propagation in any complex PTL designs. The experimental results on a 4-bit ripple carry adder demonstrate that our models can achieve high accuracy compared with SPICE simulation.