β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

In this article, we report on the fabrication of $\beta $ -Ga2O3 pseudo-CMOS inverters using enhancement-mode (E-mode) $\beta $ -Ga2O3 single-finger ( $\text{S}_{\text {F}}{)}$ and multifinger ( $\text{M}_{\text {F}}{)}$ thin-film transistors (TFTs). Initially, single-stage monolithic inverter ICs were fabricated using TFTs having threshold voltages ${V}_{\text {th}}^{\text {SF}}$ = 0.6 V and ${V}_{\text {th}}^{\text {MF}}$ = 0.1 V. However, the single-stage inverter yielded poorer gain (4.50 at ${V}_{\text {DD}}$ , supply voltage = 3 V). Alternatively, a pseudo-CMOS (double-stage) inverter was designed and fabricated, yielding a maximum gain of 6.45 but with a poor noise margin (NM). To improve the NM, the pseudo-CMOS circuit was tested using TFTs having higher threshold voltages ( ${V}_{\text {th}}^{\text {SF}}$ = 1.85 V and ${V}_{\text {th}}^{\text {MF}}$ = 1.75 V). Notably, the optimized pseudo-CMOS circuit exhibited the least peak power consumption (0.2 nW) and the maximum gain of 8 at ${V}_{\text {DD}}$ = 3 V. The monolithically integrated devices’ performance and IC highlight this technology’s remarkable potential for application in the emerging sector of power electronics and extreme-environment electronics.