Enhancing Conditional Stalling to Boost Performance of Stream-Processing Logic With RAW Dependencies

IEEE Transactions on Circuits and Systems II: Express Briefs(2023)

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摘要
Ambiguous read-after-Write (RAW) dependencies are omnipresent in multiple streaming applications, establishing hard to optimize bottlenecks. Considering actual input data, these may rarely be true dependencies. However, the increasingly used High-Level Synthesis (HLS) compilers must assume the worst-case scenario, as they rely on static optimizations. Conditional stalling is a simple yet impactful technique, useful even when conflicts are common. At the cost of a small area penalty, it allows improving (in some cases, by several times) the mean throughput of these systems. In this brief, we describe a high-frequency HLS implementation of the technique and examine its behavior as a function of input and architecture characteristics, with the goal of understanding when to use it and how to optimize throughput.
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关键词
Hardware design, high-level synthesis, read-after-write dependency, runtime optimization, latency masking
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