A 372 mu W 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator Using Hysteresis-Comparison MSB-Pass Quantization

IEEE JOURNAL OF SOLID-STATE CIRCUITS(2023)

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摘要
This article presents a nested delta-sigma modulator (DSM) structure, where an inner analog DSM is embedded in an outer analog-digital-hybrid DSM. The outer hybrid DSM is composed of the inner analog DSM, a digital filter, and a hysteresis-comparison MSB-pass quantizer. The internal signal swing of the inner analog DSM can be significantly suppressed by the outer DSM loop, thus achieving good power efficiency. Compared to conventional system-level signal swing optimization techniques, the proposed nested DSM does not suffer from residual signal error issues and distortion leakage and is more digital-friendly with great flexibility. Fabricated in a 180 nm CMOS, the prototype analog-to-digital converter (ADC), using the nested DSM structure with hysteresis-comparison MSB-pass quantization, achieves signal-to-noise ratio (SNR)/signal-to-noise-and-distortion ratio (SNDR)/spurious-free dynamic range (SFDR)/dynamic range (DR) of 110 dB/109.2 dB/119.6 dBc/110.3 dB, respectively. It achieves a measured Schreier figure of merit (FoMS) of 183.5 dB, which is among the best FoMS of the state-of-the-arts.
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关键词
Analog-to-digital conversion,continuous time (CT),delta-sigma modulator (DSM),hysteresis comparison,MSB-pass quantizer,nested DSM,power efficiency
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