Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing
IEEE Transactions on Computers(2023)
摘要
The accuracy requirements in many scientific computing workloads result in
the use of double-precision floating-point arithmetic in the execution kernels.
Nevertheless, emerging real-number representations, such as posit arithmetic,
show promise in delivering even higher accuracy in such computations. In this
work, we explore the native use of 64-bit posits in a series of numerical
benchmarks and compare their timing performance, accuracy and hardware cost to
IEEE 754 doubles. In addition, we also study the conjugate gradient method for
numerically solving systems of linear equations in real-world applications. For
this, we extend the PERCIVAL RISC-V core and the Xposit custom RISC-V extension
with posit64 and quire operations. Results show that posit64 can obtain up to 4
orders of magnitude lower mean square error than doubles. This leads to a
reduction in the number of iterations required for convergence in some
iterative solvers. However, leveraging the quire accumulator register can limit
the order of some operations such as matrix multiplications. Furthermore,
detailed FPGA and ASIC synthesis results highlight the significant hardware
cost of 64-bit posit arithmetic and quire. Despite this, the large accuracy
improvements achieved with the same memory bandwidth suggest that posit
arithmetic may provide a potential alternative representation for scientific
computing.
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关键词
Arithmetic,Posit,IEEE-754,Floating point,Scientific computing,RISC-V,CPU,Matrix multiplication,PolyBench
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