Fault-Tolerant Low-Cost Analog Sensor Implementation for By-Wire Vehicle.

This paper addresses the issue of analog sensor reliability in the context of Advanced Driver Assistance Systems (ADAS) in the automotive industry. Nowadays, many vehicles use two sensors for error detection. Two fail-safe and fault-tolerant architectures are proposed to increase sensor lifetime at a low cost. One of these architectures is proven to be more reliable and of a lower cost than a conventional Triple Modular Redundant (TMR) system. Both designs rely on a tunable TMR detection mechanism to process the analog outputs of three functionally equivalent sensors taking into account the unavoidable discrepancies after the Analog-to-digital conversion. This hardware error detection mechanism will reduce the processing time of the sensor data compared to a software scheme. The mechanism is implemented on Intel Cyclone IV GX EP4CGX150DF31I7AD FPGA; circuit delay and resource utilization are obtained. Finally, this circuit delay is compared to the execution time of a functionally equivalent software implemented on a NIOS II processor.