A 200M-Query-Vector/s Computing-in-RRAM ADC-less k-Nearest-Neighbor Accelerator with Time-Domain Winner-Takes-All Circuits

The $k$ -nearest neighbor( $k$ NN) is widely used for pattern matching, data mining, and object recognition [1]. However, the previous computing-in-memory accelerator for the $k$ NN algorithm heavily relies on analog-digital converter(ADC) circuits leading to huge area and power consumption. This paper proposed a computing-in-RRAM ADC-less k-nearest-neighbor accelerator with time-domain winner-takes-all circuits. The proposed accelerator features a time-domain winner-takes-all circuit with high PVT-variation intolerance and a scalable binary tree structure. Moreover, we improve the performance of voltage control lines circuits with fewer delay stages through the codesign of the computing-in-RRAM module and winner-takes-all circuit. The designed and simulated $k$ NN accelerator performs up to 200 million query vectors per second while consuming 0.75 mW, demonstrating> 24.5 × energy performance improvement over prior works.