Evolving Hardware by Direct Bitstream Manipulation of a Modern FPGA

2022 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC)(2022)

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摘要
Field-programmable gate arrays (FPGAs) have recently received renewed attention in the context of Evolvable Hardware (EHW). The most fine grained approach to changing their internal structure, direct manipulation of the bitstream, has largely been abandoned. The undocumented bitstream formats of modern FPGAs made it complicated and error-prone. This situation has fundamentally changed with the advent of open-source FPGA toolchains. Previous attempts to exploit this opportunity were promising, but only manged to solve very basic tasks. We present in this paper an evolved tone discriminator circuit. It was evolved by replicating the most famous experiment in this field, but with modern hardware. For that we map the originally used Xilinx XC6200 FPGA to a modern Lattice iCE40 FPGA. We show how to set up the experiment and optimize the evolution environment. Our approach allows over 130 times more reconfigurations per second than previous approaches. Additionally, we discuss reasons for the abandonment of direct bitstream manipulation for EHW in context of the new possibilities created by opensource FPGA toolchains. We show which challenges have been solved and which steps need to be taken next.
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originally used Xilinx XC6200 FPGA,modern Lattice iCE40 FPGA,direct bitstream manipulation,EHW,open-source FPGA toolchains,evolving Hardware,modern FPGA,field-programmable gate arrays,FPGAs,renewed attention,Evolvable Hardware,fine grained approach,internal structure,direct manipulation,undocumented bitstream formats,error-prone,evolved tone discriminator circuit,modern hardware
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