AlN-capped P-(AlxGal-x)2O3/Ga2O3 heterostructure field-effect transistors for near-junction thermal management of next generation power devices

While the ultrawide bandgap (Eg~4.9 e V) and high critical electric field (E c ~8 MV /cm) of ß-Ga 2 O 3 [1] has promising implications for power electronics, the very low bulk thermal conductivity (0.11-0.27 W/cm.K [2]) presents a formidable thermal challenge. For lateral devices, heat is typically generated within tens of nanometers of the semiconductor surface. Therefore, a pathway for efficient heat dissipation through the surface could substantially improve device-level thermal performance. In this work, we report the first experimental demonstration of top-side device-level thermal management of Ga 2 O 3 -based transistors by capping an (Al 0.21 Ga 0.79 ) 2 O 3 /Ga 2 O 3 heterostructure field-effect transistor (HFET) with a ~400 nm thick sputter-deposited aluminum nitride (AlN) heat spreading layer. Compared to a reference HFET, we observed a ~30% reduction in device-level thermal resistance at the gate electrode.