Collective Die-to-Wafer Self-Assembly for High Alignment Accuracy and High Throughput 3D Integration

2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)(2022)

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摘要
The die-to wafer hybrid bonding process is considered by leading microelectronics companies as essential for the success of future memory, HPC or photonic devices. However, this process is much more complex than Wafer-To-Wafer bonding and the die assembly throughput is lower. CEA-LETI has been working for several years on the development of a self-assembly process. This latter is promising to increase throughput by self-aligning several thousand of dies per hour. The present paper describes our latest work on self-assembly through a collaboration with Intel, focused on the development and maturation of a collective D2W direct bonding self-assembly process. The water dispense technique and the surface preparation to tune the surface hydrophilicity appeared as critical for the proper conduct of the self-assembly process. Thus, excellent alignment performances on a homemade collective self-assembly bonding bench was achieved. It resulted in a mean misalignment inferior to 150 nm with a 3σ inferior to 500 nm. Finally, the compatibility of the self-assembly process with a wide range of die dimensions (8x8 mm 2 , 2.7x2.7 mm 2 , 1.3x11.8 mm 2 and 2.2x11.8 mm 2 ) was demonstrated.
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关键词
3D integration,Die-To-Wafer stacking,self-assembly,direct bonding
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