Ultra-High Conductivity Interconnects for 77K CMOS Using Heterogeneous Integration

With the recent proliferation of quantum computing architectures which operate at millikelvin temperatures, there's been a growing interest in operating CMOS at cryogenic temperatures. Specifically, operating CMOS at 77K bestows several performance improvements to the front-end-of-line (FEOL) with sharper turn-on of the transistor and increased carrier mobilities. It also enables the use of high temperature superconductors (HTSs) for resistance-less interconnects. Using a HTS material, we can reduce RC delay to near zero, especially at the higher levels of the wiring hierarchy. In this paper we propose to fabricate ultra-high conductivity interconnects for 77K CMOS using the HTS yttrium-barium-copper-oxide (YBCO). The superconducting interconnects will be fabricated via the heterogeneous integration techniques of thermal compression bonding (TCB) and layer transfer. Initial characterization of single layer YBCO interconnects of line-widths ranging from 2 mu m to 100 mu m showed that all samples exhibited a superconducting transition temperature, T-c, of 88.6K with a critical current density, J(c), of 2.65 MA/cm(2) for the smallest wire geometry. We bond two levels of YBCO interconnects on two separate dies with gm overlay tolerance using thermal compression bonding with an ultrathin gold interlayer. The relative hardness and high surface roughness of YBCO pose challenges to thermal compression bonding.