Pixel Pitch Hybrid Bonding and Three Layer Stacking Technology for BSI Image Sensor

K. Tanida,S. Suzuki, T. Seo, M. Morinaga, H. Korogi, M. Tetani, M. Hamada, R. Eto,T. Yamashita, Y. Kato, N. Sato, T. Shimizu, T. Hanawa, H. Kubo,K. Ueda, F. Ito, Y. Noguchi,M. Nakamura, R. Mizukoshi, M. Takeuchi,M. Suzuki, N. Niisoe, I. Miyanaga, A. Ikeda, S. Matsumoto

2022 IEEE International Interconnect Technology Conference (IITC)(2022)

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摘要
We have developed a pixel pitch (1.35 μm) hybrid wafer bonding technology and successfully demonstrated three layer stacked backside illuminated (BSI) image sensor fabrication with full hybrid Cu-Cu direct bonding process. We found that plasma activation condition on the bonding wafer surface is a key factor of Cu-Cu contact yield improvement for smaller size Cu contacts. Optimized pixel pitch hybrid bonding shows good electrical and reliability performances. For three layer stacking, we developed through Si via (TSV) process. The second hybrid bonding process was adapted on the first hybrid bonded wafers and it shows good electrical performances. This three layer stack technology with pixel pitch hybrid bonding is promising for many different applications.
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关键词
BSI image sensor,hybrid wafer,bonding wafer surface,three layer stacking technology,copper-copper contact yield improvement,hybrid copper-copper direct bonding process,pixel pitch hybrid bonding,three layer stacked backside illuminated image sensor fabrication,TSV process,through silicon via process,electrical performances,plasma activation condition,size 1.35 mum,Cu-Cu
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