Design of a Low-Power Front-End Readout ASIC Based on Energy-Efficient Amplifiers, Featured 126 e-(rms), 0.6 mW/Channel for Si-PIN Detectors

Working life is an essential performance index for battery-powered portable radiation detectors. In these applications, an energy-efficient front-end electronic is of great importance. This paper presents design techniques and experimental results of an energy-efficient front-end readout application-specific integrated circuit (ASIC) based on gain-boost inverter amplifiers for Si-PIN detectors. A tradeoff between noise and power dissipation is performed in the first part. Next, an ASIC prototype including eight-channel analog front-ends is designed in CMOS 0.35 μm mixed-signal 3.3 V process. Each channel mainly includes a charge sensitive amplifier, a slow pulse shaper, an output buffer, a fast shaper and a discriminator. In these blocks excluding the output buffer, all core amplifiers are implemented by the inverter-based amplifier. The die size is 2.1 mm × 2.4 mm. The simulation results are obtained. The input charge range is 0.2 ~ 24 fC. The equivalent noise charge is 126 e- + 11 e- / pF. The power dissipation is about 0.6 mW/channel.