Low-Overhead Reuse Distance Profiling Tool for Multicore

EURO-PAR 2021: PARALLEL PROCESSING WORKSHOPS(2022)

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摘要
With the increase in core count in multicore systems, data movement is one of the main sources of performance slowdown in parallel applications and data locality has become a critical factor in application optimization. One of the important locality metrics is reuse distance, which shows the likelihood of a memory access to be a cache hit. In this work, we propose a low-overhead reuse distance profiling tool for multi-threaded applications. Our method relies on available hardware features in commodity CPUs, namely, Performance Monitoring Units (PMUs) and debug registers, to detect data reuse in private and shared caches by considering inter-thread cache line invalidations. Unlike prior approaches, our tool is fast, accurate, does not change the program behavior and can also handle shared cache accesses. Though it has low runtime (2.9x) and memory overheads (2.8x), our tool achieves 92% accuracy.
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关键词
Reuse distance, Hardware performance counters, Debug registers, Address sampling
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