TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge.

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)(2022)

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摘要
This paper presents TinyVers, a tiny versatile ultra-low power ML system-on-chip (SoC) to bring enhanced intelligence to the Extreme Edge. TinyVers exploits dataflow flexibility for multi-model support, and aggressive on-chip power management optimized for Extreme Edge smart sensing applications. The SoC combines a RISC-V host processor, a 17 TOPS/W flexible ML accelerator with block structured sparsity support and efficient zero-skipping for deconvolution, a 1.7 μW deep sleep wake-up controller and an eMRAM for non-volatile storage, to perform up to 17.6 GOPS while achieving a power range from 1.7 μW-20 mW. Multiple ML models for diverse applications are mapped to show the flexibility and energy efficiency of the SoC with all models achieving 1-2 TOPS/W at less than 230 μW power for continuous operation.
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关键词
multiple ML models,energy efficiency,SoC,TinyVers,state-retentive eMRAM,machine learning inference,tiny versatile ultra-low power ML system-on-chip,enhanced intelligence,dataflow flexibility,multimodel support,on-chip power management,RISC-V host processor,block structured sparsity support,extreme edge smart sensing applications,deep sleep wake-up controller,aggressive on-chip power management,flexible ML accelerator,efficient zero-skipping,power 1.7 muW to 20.0 mW
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