Effect of positive bias stress on the back-gate voltage-modulated threshold voltage in double-gate amorphous InGaZnO thin-film transistors

In the back-end-of-linedouble-gate (DG) amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs), the linearity of top-gate voltage (V-TG)-swept threshold voltage ( V-T,V-TG) with back-gate voltage (V-BG) is essential. In this work, the influence of positive bias stress (PBS) condition on both beta = partial derivative V-T,V-TG/partial derivative V-BG and Delta beta= partial derivative Delta V-T,V-TG/partial derivative V-BG is investigated in DG a-IGZO TFTs, using the subgap density-of-states (DOS) extracted before and after PBS. While Delta beta remains almost constant in the PBS condition of V-TG/V-BG = 30/-30 V, the V-TG = V-BG = 30 V condition shows the complicated nonlinear relationship between Delta V-T,V-TG and V-BG. It is found that lambda = delta Delta beta/delta V-BG, as the parametric indicator describing the PBS-induced degradation of linearity for the V-BG-controlled V-T,V-TG, is x7 larger (less linear) at V-TG = V-BG = 30 V than at V-TG/V-BG = 30/ 30 V. The origin of this non-linearity is comprehensively explained based on the model of the excessive oxygen-related defect creation resulting from broken peroxy linkage. Our result suggests that the V-TG/V-BG = 30/ 30 V is a more advantageous condition in the viewpoint of the Delta V-T,V-TG linear with V-BG, in comparison with V-TG = V-BG = 30 V.