High-performance Electrostatic Discharge Protection Device for Power Chip Based on 28 nm Process

As the characteristic size of semiconductor devices in ICs decreases, ICs are becoming more sensitive to electrostatic discharge (ESD). Electrostatic protection has become one of the most important reliability indexes in ICs, and the ESD protection structure has also become a difficult problem in chip design. A sensor exposed to static electricity can be damaged and its output signal can be disturbed. Therefore, electrostatic protection also plays an important role in sensors. As the scale of ICs increases, the number of chip pins is increasing and a larger area is being used for ESD protection circuits, resulting in higher costs. Silicon controlled rectifier (SCR) ESD protection devices have the highest performance per unit area among the known ESD protection structures, and are thus the first choice for low-cost, on-chip ESD design solutions. In this study, through a Sentaurus simulation, two SCRs with different structures (a directly connected SCR and a modified lateral SCR) are established, and transmission line pulse tests are carried out on the two devices. The key characteristic indexes are analyzed theoretically and by using experimental data. According to the simulation results, the opening voltage of the directly connected SCR is about 1.5 V and its secondary breakdown current is above 5 A, indicating that the device has a high protection level.