An Effective Software Based Method to Analyze SCA Countermeasures for Advanced Encryption Standard

As everyone is aware that all the recently introduced networks systems are in need of significant security measures and by having a separate hardware architecture for the cryptographic function, necessary high level data protection can be achieved. Advanced Encryption Standard (AES) is one of the best cryptographic algorithms to provide such high level security but it can be exploited because of its quantifiable power consumption. Recent advancement in technology uses this power consumption value to find the secret key value with the mathematical steps used in the algorithm during encryption process. This method of obtaining secret key with the power consumption is known as Side-Channel Attacks. Even though several dedicated hardware is available for analyzing the AES weakness related to SCA, but its implantation is quite difficult because of high cost or the synchronization problem between the AES implementing architecture and the power sampling rate of Analog to Digital Convertors or bandwidth of the oscilloscopes. In this research work, we proposed a technique for the purpose of Correlation and Differential Power Analysis for the FPGA implementations of AES cryptographic hardware architecture. Results from this research are used to create a detailed model of the AES power consumption with the help of advanced mathematical and statistical measures. With this research work, it is possible to provide the scenario of SCA attacks in real time without having any additional architecture for the power sampling analysis and clock frequency synchronization. Therefore the result of this research work can be used as a preventive measure of SCA attacks in the design process itself, thereby reducing the burdening of designers.