A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup

2022 IEEE International Solid- State Circuits Conference (ISSCC)(2022)

引用 3|浏览6
暂无评分
摘要
A high-performance clock generator with extremely low jitter, area, and power consumption is the key building block in the emerging Internet of Things (IoT) to connect billions of devices. Recently, digital phase-locked loops (DPLL) [1,2] have been developed to eliminate the bulky loop filter (LF) in type-II charge-pump PLLs. However, they suffer from quantization noise and spurs, requiring comple...
更多
查看译文
关键词
Frequency synthesizers,Time-frequency analysis,Voltage-controlled oscillators,Crystals,Voltage,Jitter,Calibration
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要