Engineering An Indium Selenide Van Der Waals Interface For Multilevel Charge Storage

As the continuous miniaturization of floating-gate transistors approaches a physical limit, new innovations in device architectures, working principles, and device materials are in high demand. This study demonstrated a nonvolatile memory structure with multilevel data storage that features a van der Waals gate architecture made up of a partially oxidized surface layer/indium selenide (InSe) van der Waals interface. The key functionality of this proof-of-concept device is provided through the generation of charge-trapping sites via an indirect oxygen plasma treatment on the InSe surface layer. In contrast to floating- gate nonvolatile memory, these sites have the ability to retain charge without the help of a gate dielectric. Together with the layered structure, the surface layer with charge-trapping sites facilitates continual electrostatic doping in the underlying InSe layers. The van der Waals gating effect is further supported by trapped charge-induced core-level energy shifts and relative work function variations obtained from operando scanning X-ray photoelectron spectroscopy and Kelvin probe microscopy, respectively. On modulating the amount of electric field-induced trapped electrons by the electrostatic gate potential, eight distinct storage states remained over 3000 s. Moreover, the device exhibits a high current switching ratio of 10(6) within 11 cycles. The demonstrated characteristics suggest that the engineering of an InSe interface has potential applications for nonvolatile memory.