Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs

The present paper is about using three popular performance boosters in a device to battle with deterioration in device characteristics imposed by temperature variation. The dielectric pocket (DP) technology has been utilized in double gate-all-around MOSFET to limit the leakage current problem. Further, high-K dielectric as gate oxide is employed so that ON-state current may be improved with enhanced device scalability. The boosted immunity towards short-channel effects (SCEs) and improvement in the device’s analog performance is demonstrated through comparison between dielectric pocket high-K double Gate-All-Around (DP-DGAA) and double Gate-All-Around (DGAA) MOSFETs with temperature variation from 300 to 500 K by using commercially available ATLAS, a three-dimensional (3D) device simulator from SILVACO.