Fault tolerant design validation through laser fault injection

Space based real time applications for high end computing systems require that the system not only be extremely reliable but also tolerant to a hierarchy of adverse events generally referred to as faults. At the Center for Microelectronics Research (CMR) of the University of South Florida (USF), Laser Soft Fault Injection for Fault tolerant design validation research have been carried out by a research team under the supervision of Dr. Wilfrido A. Moreno at the Laser Restructuring Laboratory (LRL) of the Center for Microelectronics Research created under a grant from the Advanced Research Project Agency (ARPA). The Laser Soft Fault Injection technique is based on using a thoroughly controlled laser beam into a Very Large Scale Integrated Circuit (VLSIC) which is a component of an operating computer capable of detecting, logging, and correcting a transient fault and then proceeding with its operation. The test vehicle is a 32-bit processor designed for 100% microcircuit fault coverage in addition to concurrent error detection, reporting, logging, and recovery. Of primary interest is the recovery from transient Single Event Upsets (SEU's) caused by high energy particles. The technique has been demonstrated with two different system level series of tests. The first test routine involved the verification of an initial set up and demo test performed at CMR on an early version of the computer which was designed just to verifying that the computer detected and logged a hardware error in the register file of the Central Processing Unit (CPU). A second series of test were designed to observe the incrementing of the error count register and correlated to the number of Laser pulses applied. During the second series of tests, and for the first time, the result was obtained of observing the processor detect a hardware fault, log and correct it and then proceed with the present instruction. The previous being evident by the data entered by the processor in the statusing registers. At the present, the application of fault tolerant systems is primarily in space where high energy particles penetrate the electronics and transfer sufficient energy to semiconductors to upset the state of storage elements. While the number of these systems is about to increase significantly with the deployment of SPACEWAY, GLOBALSTAR, and IRIDIUM, a more significant development is that the feature size and operating voltage of commercial electronics continues to drop, such that the amount of energy required to produce an upset may soon be found at ground level!. It is reasonable to project that Laser fault injection can become embedded in the system development process to support rapid prototyping as well as system level validation by test. The complete test setup and test validation strategies including samples of test result will be presented at the conference.