Analysis Of The Impact Of Delay On The Stability Of Single-Loop Controlled Grid-Connected Inverters From The Perspective Of Impedance

This article proposes a concept of "impedance trough" in the output impedance of inverter, which is directly caused by the digital control delay. At the impedance trough, the magnitude of the output impedance drops sharply, while the phase rises distinctly. By studying the output impedance model of the single-loop controlled inverter, the origin of the impedance trough, and its analytical relationships with current loop dynamics and delay values are drawn in bode diagram and complex-plane representation, respectively. For the first time, the detailed influence of delay on the dq-frame output impedance of inverter is analyzed. Further, the influence of the impedance trough on the stability of the grid-tied inverter is assessed through d-d channel impedance matching, and Generalized Nyquist Criterion. It is found that current loop dynamics and delay value variations would result in both severe magnitude and phase change in the d-d channel impedance, which are the leading causes to high-frequency oscillation in the grid-tied system. Finally, experimental results validate the theoretical analysis.