Algorithm / Architecture Co-Design of a Stochastic Simulation System-on-Chip

Computational models of gene regulatory networks (GRNs) well describe the behavior of interactions among molecular species over time. For larger networks, the problem of state-space explosions makes such approaches practically unsound. D. T. Gillespie discovered a statistically identical way of simulating the time evolution of species populations, leveraging a Monte Carlo technique, so-called stochastic simulation algorithm (SSA). The SSAs lend themselves accurately well to stochasticity in GRNs and other biochemical reaction systems in a well-stirred environment. The computational burdens of SSAs, however, incur immensely slow simulation run times needed to simulate a biological time of interest. In this report, we investigate various SSAs and introduce a custom yet highly scalable stochastic simulation system-on-chip (SSSoC) architecture which can achieve greater speed-ups in the simulation. With careful co-design of algorithms and microarchitectures, we compare and predict the possible SSA candidates that are well suited for hardware acceleration. Furthermore, we show how the architecture can be operated in different networking modes by exploiting coarse-grain parallelism in the algorithms. Based on our theoretical analysis, results show that our approach can achieve orders of magnitude higher performance than software simulations on a typical workstation. We believe the initial studies carried out in this report render us some guidelines toward the future research ahead of us.