An FPGA-based log-structure Flash memory system for space exploration

In space exploration, the flash memory system on the detector needs to retrieve the recorded data and transmit it to the Earth. In order to make better use of valuable transmission time, researchers hope that the system has more accurate retrieval capabilities. In previous space-borne flash memory system designs, the indexing accuracy of the system was limited by the limited RAM capacity. In this paper, we propose an FPGA-based system design method. This method uses a mechanism of the log structure to manage the flash to save RAM capacity. It can achieve very small data granularity, and each data particle has expandable index information, which improves the system index accuracy with limited RAM capacity. The experimental results show that the proposed system implements a 512Gb flash memory system with page-scale data granularity. It only requires 2.7Mb of RAM capacity overhead for indexing. The system has an average write rate of 329.3 Mbps and an average index latency of 39.3 us.