Efficient Conversion of Boolean Circuits to Nondeterministic Branching Programs

2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(2019)

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摘要
Two models to realize boolean functions exists: Boolean circuits (BCs) a DAG of and/or/not-gates and Branching programs (BPs) a network of switching nodes wherein signals propagate through the switched nodes. Evaluation of BCs is inherently sequential (Based on the common belief that P ≠ NC) while BPs can be evaluated in parallel by verifying connectivity between the source and the sync nodes of an equivalent BP. This suggests a way to parallelize or evaluate in parallel inherently sequential computations (ISCs) by compiling them to BCs and then convert them to BPs. Our results suggest that BCs emanating from real computations can be converted to-BPs with no size blowup compare to the size of the original BC and in fact have a smaller size compared to the size of the original BCs.
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关键词
Parallel evaluation,nondeterministic branching programs,parallel BFS
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