TCAD Simulation on FinFET n-type Power Device HCI Reliability Improvement

FinFET technology can significantly improve CMOS device performance due to its unique Fin structure, which provides tight gate control over the channel. With FinFET architecture, hot carrier injection (HCI) effect is one of the major reliability concerns in VLSI circuits [1]. In this paper, we present a systematic n-type power device performance evaluation and HCI reliability assessment for 14nm FinFET based on the evaluation of the peak substrate current. With TCAD simulation, we demonstrate that n-type power device HCI can be significantly improved by optimizing source/drain implantation without performance degradation. After optimization, a reduction of 32% of the peak substrate current is obtained.