Energy Efficient Power Distribution On Many-Core Soc

We propose a scheme for delivering power to parts of a large integrated circuit, such as cores in a system-on-chip (SoC), at a higher voltage than VDD. The increased voltage lowers the current through the power grid and thereby reduces the (IR)-R-2 loss of the on-chip power distribution. This novel idea for VLSI devices, is inspired from the distribution system of commercial long distance power transmission networks. Our scheme steps down voltage to the VDD level with on-chip DC-to-DC converters placed close to the cores, in a similar way as electrical networks use transformers. The distribution grid efficiency is the fraction of the total power taken from the source that is delivered to loads (cores). SPICE simulation was done for modeled grid for SoCs. A 64-core SoC, each core operating at 1V and consuming 1W, dissipated 88W giving 73% grid efficiency. When the grid distributed 3V (close to the output of a Li-ion battery) and ideal step down converters were used, the efficiency rose to 96%. Using the data of a commercial DC-to-DC converter, we obtained a grid efficiency of 88%. This paper also points to the need for high efficiency DC-to-DC converters suitable for on-chip integration.