3D Monolithic Stacked 1T1R cells using Monolayer MoS 2 FET and hBN RRAM Fabricated at Low (150°C) Temperature

We demonstrate 3D monolithically integrated two-level stacked 1-transistor/1-resistor (1T1R) memory cells, using monolayer MoS transistors and few-layer hBN RRAMs, fabricated at temperatures below 150 °C. The stacking process is scalable to an arbitrarily large number of layers and on any substrate material without foreseeable physical limitations. The 1T1R cells can be switched with programming current $130 mumathrm{A}$ and voltage transistor has low off-current due to the large band gap of monolayer MoS $(mathrm{E}_{mathrm{g}} u003e 2 text{eV})$ . We also show that the linearity of RRAM resistance change is well-controlled by the gate voltage of the transistor.