A flexible leakage trace collection setup for arbitrary cryptographic IP cores

Leakage Assessment and Side Channel Attacks (SCA) leakage trace acquisition tools and platforms require a considerable amount of time to collect millions of traces and rely on custom, hard to change or handle acquisition control mechanisms. To match these problems, in this paper, a flexible and scalable architecture for leakage trace collection is proposed, providing a fast, reconfigurable and flexible control mechanism that can be easily scaled to a wide variety of Devices Under Test (DUT). The proposed system migrates test vector generation, control and transmission, from off-board Personal Computer (PC) to an on-board embedded-system hardware control mechanism. The proposed solution provides a toolset that can be used to structure various leakage assessment scenarios, regardless of the DUT's implemented cryptographic algorithm. The proposed approach enables single, multiple encryption per control loop round and DUT clock frequency adjustment to achieve accurate and fast leakage trace collection even for low-mid range oscilloscopes.