Debugging framework for FPGA-based soft processors
2016 International Conference on Field-Programmable Technology (FPT)(2016)
摘要
Soft processors are one way to raise the computational abstraction of FPGAs while keeping the advantages of reconfigurable hardware, such as adaptability, deterministic performance and high performance/watt. Software developers can quickly build, test and deploy applications using familiar tools while still leveraging important optimizations such as application-specific custom instructions. However, they also present unique debugging problems. For example, the higher-level programming abstraction runs contradictory to classical low-level debugging tools like logic analyzers. In this work we present a debugging framework for FPGA-based soft processors that enables step-by-step debugging at the level of all soft processor instructions, time-travel debugging, post-mortem memory dumps, and performance metrics. By using knowledge about the soft processor's internals, our framework can capture execution traces up to 60× more space-efficient than traditional embedded logic analyzers.
更多查看译文
关键词
debugging framework,FPGA-based soft processors,computational abstraction,reconfigurable hardware,deterministic performance,high performance/watt,application-specific custom instructions,debugging tools,logic analyzers,time-travel debugging,post-mortem memory dumps,performance metrics
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要