VLSI design and analysis of a critical-band processor for speech recognition
SoCC（2004）
摘要
The critical-band analysis plays a very important role in the frond-end feature extraction for speech recognition. In this paper, a generic low-power and low-voltage VLSI design of a critical-band transform (CBT) processor is proposed. Design and analysis of a 21-band Munich Bark scale CBT processor showed that it can achieve significant power-efficiency by the reduction in computational complexity, implementation of pipeline and parallel processing, and application of supply voltage scaling technique. Simulation results showed that it can complete a CBT analysis (including I/O process) in 4.99ms on one 160-point segment of speech at a very low system clock frequency of 234 kHz. This would support a CBT analysis for 50% overlap 10 ms segments of speech at a sampling frequency of 16 kHz. The power dissipation is 1413.6 μW/MHz and 66.7 μW/MHz for supply voltage of 3.3 V and 1.1 V, respectively. It contains 206273 transistors and occupies 2.69 mm2 for a 0.35 μm CMOS technology.
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关键词
parallel processing,0.35 micron,speech recognition,microprocessor chips,power dissipation,munich bark scale cbt processor,critical-band analysis,low-power electronics,vlsi design,cbt analysis,clock frequency,234 khz,cmos technology,computational complexity,critical-band transform processor,feature extraction,vlsi,integrated circuit design,supply voltage scaling,frond-end feature extraction,1.1 v,3.3 v,16 khz,pipeline processing,sampling frequency,low voltage,power efficiency,low power electronics
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