Surface Defect Passivation of Silicon Micropillars

Reactive ion etching (RIE) used to fabricate high-aspect-ratio (HAR) nano/microstructures is known to damage semiconductor surfaces which enhances surface recombination and limits the conversion efficiency of nanostructured solar cells. Here, defect passivation of ultrathin Al2O3-coated Si micropillars (MPs) using different surface pretreatment steps is reported. Effects on interface state density are quantified by means of electrochemical impedance spectroscopy which is used to extract quantitative capacitance-voltage and conductance-voltage characteristics from HAR dielectric-semiconductor structures which would otherwise suffer from high gate leakage currents if tested using solid-state metal-insulator-semiconductor structures. High-temperature thermal oxidation to form a sacrificial oxide on RIE-fabricated Si MPs, followed by atomic layer deposition of 4 nm thick Al2O3 after removal of the sacrificial layer produces an interface trap density (D-it) as low as 1.5 x 10(11) cm(-2) eV(-1) at the mid-gap energy of silicon. However, a greatly reduced mid-gap D-it (2 x 10(11) cm(-2) eV(-1)) is possible even with a simple air annealing procedure having a maximum temperature of 400 degrees C.