Design and Evaluation of LAr Trigger Digitizer Board in the ATLAS Phase-I Upgrade.

The LHC upgrade is planned to enhance the instantaneous luminosity during Run 3 from 2021 through 2023. The Phase-I upgrade of the trigger readout electronics for the ATLAS Liquid Argon (LAr) Calorimeters will be installed during the second long shutdown of LHC in 2019-2020. In this upgrade, the so-called super cells are introduced to provide higher granularity, higher resolution and longitudinal shower shape information from the LAr calorimeters to the level-1 trigger processors. A new LAr Trigger Digitizer Board (LTDB) will process and digitize 320 channels of super cell signals, and transmit them via 40 fiber optical links to the back end where data are further processed and transmitted to the trigger processors. Five pairs of bidirectional GBT links are used for slow control from the Front-end LInks eXchange (FELIX) in the ATLAS TDAQ system. LTDB also outputs 64 summed analog signals to the current Tower Builder Board via the new baseplane. A test system is developed to evaluate all functions of the LTDB and carry out the performance measurement. A back end PCIe card is designed which has the circuit to interface to the ATLAS trigger, time and control system. It controls the generation of injection signals to the LTDB for performance test. It also configures and calibrates all ASICs on the LTDB. A front-end test board, test baseplane and a crate are designed to extend the capability of the test setup, which will be used for the production test of the 124 LTDB boards.