Three-phase inverter employing PCB embedded GaN FETs

THIRTY-THIRD ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2018)(2018)

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摘要
As applications continually push inverter designs to be more dense, traditional power electronic fabrication and assembly techniques must be reevaluated for opportunities to make hardware smaller and lighter. Applying new printed circuit board (PCB) fabrication technology to physically embed die-level switching devices between internal layers enables a reduction in the overall package volume of inverter systems and decreases power trace lengths. In addition, the reduced power dissipation and increased switching frequency afforded by wide bandgap devices makes them a sensible choice for use in high density inverter designs. This paper describes our effort for designing, fabricating, and testing a three-phase back-to-back inverter with embedded GaN FETs, intended to demonstrate some of the expected benefits of this technology.
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关键词
embedded PCB,GaN FET,low parasitic inductance,inverter
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